| Job Location | Bayan, Malaysia |
| Education | Not Mentioned |
| Salary | Not Mentioned |
| Industry | Other |
| Functional Area | Not Mentioned |
Custom Layout EngineerResponsibilities: Design and implement physical layouts for RF memory circuits from schematics, ensuringoptimal performance and manufacturability. Perform floorplanning and placement of circuit elements, considering factors like power,noise, and signal integrity. Utilize Electronic Design Automation (EDA) tools, such as Cadence Virtuoso Layout Suite,for efficient and accurate layout creation. Conduct rigorous physical verification (LVS and DRC) to ensure the layout adheres todesign rules and is electrically equivalent to the schematic. Collaborate closely with design engineers and other team members to resolve layout issuesand optimize performance. Document layout designs and verification procedures clearly and concisely. Stay up-to-date with the latest advancements in RF layout techniques and EDA tools.Requirements: Bachelors degree in Electrical Engineering, Computer Engineering, or a related field. Minimum 2+ years of experience in custom layout design, preferably with RF or mixed-signal circuits. Proven expertise in physical verification using LVS (Layout Versus Schematic) and DRC(Design Rule Check) tools. In-depth knowledge of CMOS (Complementary Metal-Oxide-Semiconductor) processtechnologies. Experience with Cadence Virtuoso Layout Suite or similar EDA tools is a must. Excellent problem-solving and analytical skills. Meticulous attention to detail and a commitment to quality. Effective communication and collaboration skills.
Keyskills :
Memory analytical floorplanning Cadence LVS Integrity Problem-solving CMOS Rf Collaboration DRC Placement Power noise virtuoso signal Process communication Circuits Eda Technologies
Infinecs
Job Source: www.infinecs.com
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